1. Technical Field
The present disclosure relates to a wiring board including a through electrode passing through a semiconductor substrate and being insulated from the semiconductor substrate and a wiring connected to one end of the through electrode and being electrically connected to an electronic component.
2. Related Art
A wiring board 200 shown in FIG. 1 has hitherto been used as a re-wiring board (an interposer) for electrically connecting a semiconductor chip to a mounting board such as a mother board.
FIG. 1 is a cross-sectional view of a wiring board in the related-art.
By reference to FIG. 1, the related-art wiring board 200 includes a semiconductor substrate 206 corresponding to a base-body, an insulating film 207, through electrodes 208, and wirings 211 and 212.
The semiconductor substrate 206 is a plate-like silicon substrate having through holes 215. Specifically, an n-type silicon substrate or a p-type silicon substrate is used as the semiconductor substrate 206. The insulating film 207 is provided so as to cover almost the overall surface of the semiconductor substrate 206 including an upper surface 206A, a lower surface 206B, and portions of the semiconductor substrate 206 exposed from the through holes 215.
The through electrodes 208 are electrodes for electrically connecting the wirings 211 to the wirings 212 and provided so as to fill the through holes 215 on which the insulating film 207 is formed. Cu may be used as a material for the through electrodes 208, for example. The wirings 211 are provided so as to extend from upper ends of the respective through electrodes 208 to the insulating film 207 formed on the upper surface 206A of the semiconductor substrate 206. The wirings 211 are wirings electrically connected to an electronic component 201 (e.g., a semiconductor chip).
The wirings 212 are provided so as to extend from lower ends of the respective through electrodes 208 to a lower surface of the insulating film 207 formed on the lower surfaces 206B of the semiconductor substrate 206. The wirings 212 are wires electrically connected to pads 203 of a mounting board 202 (e.g., a mother board) (see e.g., JP-A-2007-42741).
In the wiring board 200 configured as mentioned above, when the semiconductor substrate 206 is made of silicon, a semiconductor element such as a diode or a transistor can be readily formed in the semiconductor substrate 206 by forming a p-type impurity diffusion layer and an n-type impurity diffusion layer therein. Further, when the impurity diffusion layers formed in the semiconductor substrate 206 and the electronic component 201 are electrically connected together, it is possible to protect the electronic component 201 and adjust characteristics of the electronic component 201 by the elements formed in the semiconductor substrate 206.
The wiring board 200 is different from a common semiconductor device in that the through holes 215 and the through electrodes 208 are formed in the semiconductor substrate 206. For this reason, in the related-art wiring board 200, there in a problem in that characteristics of elements formed in the semiconductor substrate 206 are deteriorated due to the through holes 215 and the through electrodes 208, more specifically, an increase in leakage current.
Specifically, for instance, when impurity concentration of the semiconductor substrate 206 is low (e.g., in case of impurity concentration being less than 1.0×1017 ions/cm3), an inversion layer is likely to be formed in the areas (hereinafter called “sidewalls”) of the semiconductor substrate 206 corresponding to side surfaces of the through holes 215 on which the insulating film 207 is formed and areas (hereinafter called “sidewall areas”) of the semiconductor substrate 206 located near the sidewalls. Thus, when the inversion layer is inductively formed in the sidewall areas surrounding the respective through electrodes 208 by a potential difference between the semiconductor substrate 206 and the through electrodes 208, the inversion layer is linked to the impurity diffusion layer, thus to increase an equivalent junction area between the impurity diffusion layer and the semiconductor substrate 206. This leads to an increase in a leakage current of the element.
The through holes 215 are generally formed by dry etching such as RIE. When the through holes 215 are formed by dry etching, it is known that a layer (a layer called a plasma-damaged layer or an etching-damaged layer) whose lattice structure is destroyed is formed in the sidewall areas surrounding the through holes 215. Further, when the through holes 215 are formed by dry etching, it is also known that a by-product such as Fluorocarbon adheres to the sidewalls surrounding the through holes 215. The damaged layer and the byproducts are naturally removed after dry etching. However, if they are insufficiently removed, the insulating film 207, which is to be formed in the through holes 215, is deteriorated as compared with the other areas in terms of insulation characteristics. As a result, if other factors, such as diffusion and intrusion of Cu from the through electrodes 208 or intrusion of contaminants (e.g., Fe, Na, K and the like) from the outside, further combines with deterioration of the insulation characteristics of the insulating film 207, a leak current is generated in an area of the insulating film 207 subjected to diffusion of Cu or intrusion of contaminants (e.g., Fe, Na, K, and the like) from the outside. This leads to an increase in the leakage current of the element.